Update 2019feb03hkt2157 – Latch Up References
Latch–up – Wikipedia
A latch–up is a type of short circuit which can occur in an integrated circuit . More specifically it is the inadvertent creation of a low-impedance path between the power supply rails of a MOSFET circuit, triggering a parasitic structure which disrupts proper functioning of the part, possibly even leading to its destruction due to overcurrent.
The parasitic structure is usually a PNPN structure which acts as a PNP and an NPN transistor stacked next to each other. During a latch–up when one of the transistors is conducting, the other one begins conducting too. They both keep each other in saturation for as long as the structure is forward-biased and some current flows through it.
The latch–up does not have to happen between the power rails – it can happen at any place where the required parasitic structure exists.
A common cause of latch–up is a positive or negative voltage spike on an input
or output pin of a digital chip that exceeds the rail voltage by more than a diode drop.
Another cause is the supply voltage exceeding the absolute maximum rating, often from a transient spike in the power supply.
It leads to a breakdown of an internal junction.
Parasitic structure – Wikipedia
In a semiconductor device, a parasitic structure is a portion of the device that resembles in structure some other, simpler semiconductor device, and causes the device to enter an unintended mode of operation when subjected to conditions outside of its normal range.
For example, the internal structure of an NPN bipolar transistor resembles two PN junction diodes connected together by a common anode. If a sufficient forward bias is placed on this junction it will form a parasitic diode structure, and current will flow from base to collector.
A common parasitic structure is that of an SCR. Once triggered, an SCR conducts for as long as there is a current, necessitating a complete power-down to reset the behavior of the device. This condition is known as latchup.